KMU-innovativ: electronics / autonomous driving / HPC

Programm · 7 minutes

KMU-innovativ electronics funds leading-edge SME research in microelectronics, power electronics, sensors, autonomous driving and HPC with grants of up to 70%.

Up to 70% funding for leading-edge SME research in electronics, autonomous mobility and high-performance computing.

KMU-innovativ electronics / autonomous driving / HPC is the hardware and mobility strand of the BMFTR's KMU-innovativ initiative. As an SME you can have high-risk leading-edge research funded in micro- and nanoelectronics, power electronics, sensors, autonomous driving and high-performance computing. Depending on company size and R&D category, the grant is up to 70% of eligible costs. The application has two stages and runs through VDI/VDE-IT's EEE office in Dresden, with outline deadlines on 15 April and 15 October each year.

Eligibility

  • SME status under the EU definition (GBER Annex I): fewer than 250 employees and annual turnover ≤ €50m or a balance sheet total ≤ €43m; linked and partner companies are counted pro rata.
  • The research core lies in the technology field of electronics / autonomous driving / HPC: micro- and nanoelectronics, power electronics, sensors and MEMS, autonomous vehicle electronics, ADAS/V2X, HPC architectures, embedded systems or trusted electronics.
  • Leading-edge character: high scientific and technical risk, significant innovation beyond the international state of research. Simply adapting existing hardware platforms with no methodological contribution isn't enough.
  • The project qualifies as industrial research or experimental development under Art. 25 GBER: not pure basic research and not market launch.
  • The registered office and operating site are in Germany.
  • Not an undertaking in difficulty under Art. 2 no. 18 GBER.
  • No outstanding EU recovery order for unlawful aid (Art. 1 (4) (a) GBER).
  • At least one qualified R&D specialist with a relevant hardware, embedded or HPC profile, or cooperation with a relevant research institution.
  • For joint projects: the SME has to lead the consortium. Universities or research institutions may not be consortium leader.
  • The project may not begin before the funding decision is received (the ban on an early start, § 44 BHO, Art. 6 GBER).

Eligible costs

  • Staff costs: gross pay including the employer's social security contribution × the project-related R&D share (hardware designers, ASIC and chip developers, firmware and embedded engineers, system architects, test and verification engineers).
  • Materials and consumables: wafers, sensor elements, PCB prototypes, components (passive, active, power semiconductors), test boards, cleanroom consumables.
  • Equipment and plant (depreciation share): pro rata depreciation on specialist equipment used on the project such as wafer probers, high-frequency and power measurement rigs, FPGA prototyping boards, HPC clusters, climate chambers and vehicle test platforms.
  • Travel: project-related business travel under the BRKG (IEEE ISSCC/IEDM/DAC, OEM and Tier 1 meetings, foundry visits, consortium meetings).
  • External services and subcontracts: foundry services (MPW tape-outs through IMEC, Europractice, X-FAB, GlobalFoundries), mask costs, external characterisation and measurement, certification and accreditation providers (ISO 26262, AEC-Q100/200, IEC 61508), EDA tool licences (project share), cloud EDA, use of vehicle test grounds.
  • Universities as consortium partners: staff expenditure, material expenditure, travel and external services (the AZA expenditure basis) plus a 20% project flat rate on the grant.
  • Not eligible: patent filing costs (these are your own contribution).

Common pitfalls

Missing the deadline

The outline is assessed at the next deadline (15 April or 15 October). Miss one and you wait 6 months. The PT-Outline tool can be overloaded on the deadline itself, so submit at least 2–3 weeks earlier.

Choosing the wrong project management agency

For electronics / autonomous driving / HPC only VDI/VDE-IT's EEE office in Dresden is responsible (KMUinnovativ-EEE@vdivde-it.de). Projects with a software or AI focus belong to the ICT-SWS line at PT KI Berlin; submitting to the wrong one leads to rejection.

An outline that's too long

The project outline may run to a maximum of 12 pages (A4, 11pt, 1.5 line spacing). Pages beyond that aren't read by the review panel.

No leading-edge character

Simply adapting existing semiconductor platforms, sensors or HPC systems with no methodological contribution is rejected. The distance to the international state of the art has to be evidenced with concrete benchmarks; IEEE ISSCC, IEDM, VLSI, DAC and SC/HPCA are the reference venues.

A consortium without SME leadership

In joint projects an SME has to lead the consortium, even where Fraunhofer institutes, universities or IHP are the substantive drivers. Outlines without an SME consortium leader are formally rejected.

Starting the work early

No orders, contracts, hiring, foundry tape-out reservations or wafer orders for the project before the approval date. A breach risks full clawback of the grant.

Automotive without addressing ISO 26262 / AEC-Q

Anyone developing semiconductors or systems for automotive use has to sketch the ASIL classification (ISO 26262), the AEC-Q qualification path (AEC-Q100 for ICs, AEC-Q200 for passives) and, for autonomous driving, ISO 21448 (SOTIF) in the project, otherwise the exploitation plan isn't credible.

Foundry costs with no quotes

Mask costs and MPW tape-outs are eligible as external services, but only where a market-standard award is evidenced (at least one quote or a reasoned choice of foundry). Without quotes, that cost item risks being cut in the full application.

The application process

  • 1 — Check SME status and the thematic field. First check your SME status under GBER Annex I (including linked companies and OEM, Tier 1 and VC holdings). Clarify whether the research core is clearly electronics / autonomous driving / HPC; for mixed projects with a software or AI focus, contact the EEE office's hotline: KMUinnovativ-EEE@vdivde-it.de, tel. 0351-486797-20.
  • 2 — Decide between a consortium and a single project. Decide whether you apply alone (a single project) or bring in a university or research institution (Fraunhofer IIS/IZM/IPMS/IMS, IHP Frankfurt (Oder)) as a partner. In a consortium the SME necessarily leads. Cooperating with a research institution raises the funding rate by 15 percentage points.
  • 3 — Write and submit the project outline. Produce the project outline (10–12 pages, A4, 11pt, 1.5 line spacing) in the EEE office's PT-Outline tool (https://www.elektronikforschung.de/foerderung/kmu-innovativ). It has to contain: the objective, the international state of research with benchmarks, the innovative approach, a work plan with a TRL roadmap and measurable milestones, an exploitation plan including IP and supply chain strategy, and the team's qualifications. Submission is possible at any time; assessment happens at the next deadline (15 April or 15 October). Next deadline: 15 October 2026.
  • 4 — Wait for the assessment. The EEE office's review panel assesses the outline within around 2 months of the deadline. If the assessment is positive you receive an invitation to submit a full application.
  • 5 — File the full application through easy-Online. Submit the full application through the federal portal easy-Online (https://foerderportal.bund.de/easyonline/). Typical deadline: 3 months after the invitation. Required documents: the form AZK (companies) or AZA (universities), a detailed project description, an SME declaration (GBER Annex I), an exploitation plan, the last 2 sets of annual accounts, a commercial register extract and CVs of the key people. For a consortium: a cooperation agreement with IP provisions.
  • 6 — Receive approval and start the project. The funding decision arrives around 2–3 months after the full application. The project may only begin once the decision has arrived: no orders, hiring or foundry reservations beforehand.

How upsmart helps

We match your project against more than 2,000 programmes, including checking the right line (the EEE office in Dresden or ICT-SWS in Berlin) and calculating the GBER rate with the 15-percentage-point cooperation bonus. We write the draft outline and full application; your team decides. We keep an eye on the 15 April and 15 October deadlines and on the FZulG cumulation limit. Fixed terms, independent of the grant amount.

Combining it with other programmes

Cumulation with the Forschungszulage (FZulG) is possible, but only for different cost blocks. Costs funded by KMU-innovativ may not also feed into the FZulG assessment base; your own contribution and staff costs not covered can be claimed for the FZulG. No double funding of the same costs with ZIM, Horizon Europe (KDT JU / Chips JU) or IPCEI microelectronics.

Frequently asked questions

Only SMEs as defined by the EU can apply: fewer than 250 employees and annual turnover of no more than €50m or a balance sheet total of no more than €43m. The registered office has to be in Germany. In joint projects, universities and research institutions can take part as partners, but the SME has to lead the consortium.

The funding rate for small SMEs is up to 70% for industrial research and up to 45% for experimental development. Medium-sized SMEs receive up to 60% and 35% respectively. If you cooperate with a research institution the rate rises by 15 percentage points. The guide figure for eligible costs is around €500,000 per SME share.

The procedure has two stages. First you submit a 10 to 12-page project outline through the EEE office's PT-Outline tool (VDI/VDE-IT, Dresden) by the deadline of 15 April or 15 October. If the assessment is positive (after around 2 months) you are invited to submit the full application through easy-Online. The next deadline is 15 October 2026.

Funded are projects in micro- and nanoelectronics, power electronics (SiC/GaN), sensors and MEMS, electronic systems and heterointegration, autonomous driving and ADAS/V2X, high-performance computing, and embedded systems and trusted electronics. Software- and AI-centred projects belong to the sister line ICT-SWS at PT KI Berlin.

Yes, the combination is possible, but only for different cost blocks. Costs funded by KMU-innovativ may not also be claimed for the Forschungszulage. Your own contribution and staff costs not covered by KMU-innovativ can be brought into the Forschungszulage.

Read on in the blog

Funding strategy across the innovation process

Primary sources

  • Topic page KMU-innovativ electronics / autonomous driving / HPC— VDI/VDE Innovation + Technik GmbH (KMU-innovativ EEE office)
  • KMU-innovativ — overview and funding guideline— Federal Ministry of Research, Technology and Space (BMFTR)
  • BMFTR microelectronics strategy— Federal Ministry of Research, Technology and Space (BMFTR)
  • easy-Online application portal (full application, stage 2)— Federal Office of Administration / BMFTR

A 30-minute demo on your actual case. We'll show you how the platform structures funding programmes and makes overlaps with other schemes visible.

Research & development

Turn what you read into an application.

If this applies to your project, we'll tell you in thirty minutes which programme fits and which one rules the others out.